石室中学物理老师:VCC,VDD,VSS的区别

一直不太清楚VCC,VDD,VSS的区别，上网查了下
一、解释
VCC：C=circuit 表示电路的意思, 即接入电路的电压；
VDD：D=device 表示器件的意思, 即器件内部的工作电压；
VSS：S=series 表示公共连接的意思，通常指电路公共接地端电压。
二、说明
1、对于数字电路来说，VCC是电路的供电电压,VDD是芯片的工作电压（通常Vcc>Vdd），VSS是接地点。
2、有些IC既有VDD引脚又有VCC引脚，说明这种器件自身带有电压转换功能。
3、在场效应管（或COMS器件）中，VDD为漏极，VSS为源极，VDD和VSS指的是元件引脚，而不表示供电电压。
4、一般来说VCC=模拟电源,VDD=数字电源,VSS=数字地,VEE=负电源
另外一种解释：
Vcc和Vdd是器件的电源端。Vcc是双极器件的正，Vdd多半是单级器件的正。下标可以理解为NPN晶体管的集电极C，和PMOS or NMOS场效应管的漏极D。同样你可在电路图中看见Vee和Vss，含义一样。因为主流芯片结构是硅NPN所以Vcc通常是正。如果用PNP结构Vcc就为负了。荐义选用芯片时一定要看清电气参数。
Vcc 来源于集电极电源电压, Collector Voltage, 一般用于双极型晶体管, PNP 管时为负电源电压, 有时也标成 -Vcc, NPN 管时为正电压.
Vdd 来源于漏极电源电压, Drain Voltage, 用于 MOS 晶体管电路, 一般指正电源. 因为很少单独用 PMOS 晶体管, 所以在 CMOS 电路中 Vdd 经常接在 PMOS 管的源极上.
Vss 源极电源电压, 在 CMOS 电路中指负电源, 在单电源时指零伏或接地.
Vee 发射极电源电压, Emitter Voltage, 一般用于 ECL 电路的负电源电压.
Vbb 基极电源电压, 用于双极晶体管的共基电路.
Vcc, Vdd, Vss, etc.
These notations are used in describing voltages at various common power supply terminals (at these points, only a wire lead exists between the point and a power source) of a given circuit. It turns out that these common voltage terms map to transistor technology as follows:
BJT FET "Vxx" meaning
Vcc Vdd Positive supply voltage
Vee Vss Negative supply, ground
Apparently this terminology originated in some way from the terminals of each type of transistor, and their common connections in logic circuits (i.e., Vcc is often applied to BJT collectors, Vee to BJT emitters, Vdd to FET drains, and Vss to FET sources). This notation then carries across to integrated circuits -- TTL ICs were originally based on BJT technology, and so often use the Vcc / Vee terminology; CMOS ICs are based on FET technology, and so often use the Vdd / Vss terminology.
The absolute distinctions between these common supply terms has since been blurred by the interchangeable application of TTL and CMOS logic families. Most CMOS (74HC / AC, etc.) IC data sheets now use Vcc and Gnd to designate the positive and negative supply pins